Members Only

The CPMT Members Only area delivers technical content from a variety of sources to Society members -- as a membership benefit.  Content may include selected presentations from regional conferences, Chapter workshops,seminars and meetings; announcements of upcoming CPMT Webinars and recordings of past CPMT Webinars; and special offers.  View recordings (if available) and presentation files.


Upcoming Webinars

Probabilistic Design for Reliability in Electronics and Photonics July 19, 2017 11:00 AM EDT  Register 

Presenter: Ephraim Suhir


The recently suggested probabilistic design for reliability (PDfR) concept in electronics and photonics (EP)  is based on  1) highly focused and highly cost-effective failure oriented accelerated testing (FOAT),  aimed at understanding the physics of the anticipated failures and at quantifying, on the probabilistic basis, the outcome of  FOAT conducted for the most vulnerable element(s) of the product of interest for its most likely applications and the most meaningful combination of possible stressors (stimuli); 2) simple and physically meaningful predictive modeling (PM), both analytical and computer-aided, aimed at bridging the gap between the FOAT data and the most likely  operation conditions; and 3) subsequent FOAT-and-PM-based sensitivity analyses (SA) using the methodologies and algorithms developed as by-products at the two previous steps.  The PDfR concept proceeds from the recognition that nothing is perfect and that the difference between a highly reliable and an insufficiently reliable product is “merely” in the level of the probability of its failure. If this probability, evaluated for the anticipated loading conditions and the given time in operation, is not acceptable, SA can be effectively employed to determine what could/should be changed to improve the situation. The PDfR analysis enables one also to check if the product is not over-engineered, i.e., is not superfluously robust.  If it is, it might be too costly. The operational reliability cannot be low, but it does not have to be higher than necessary either. It has to be adequate for the given product and application. When reliability and cost-effectiveness are imperative, ability to optimize reliability is a must, and no optimization is possible if reliability is not quantified. It is shown also that the optimization of the total cost associated with creating a product with an adequate (high enough) reliability and acceptable (low enough) cost can be interpreted in terms of the adequate level of the availability criterion. The major PDfR concepts are illustrated by practical examples. We elaborate on the roles and interaction of analytical (mathematical) and computer-aided (simulation) modeling. It is shown also how the recently suggested powerful and flexible Boltzmann-Arrhenius-Zhurkov (BAZ) model and particularly its multi-parametric extension could be successfully employed to predict, quantify and assure operational reliability. The model can be effectively used to analyze and design EP products with the predicted, quantified, assured, and, if appropriate and cost-effective, even maintained and specified probability of operational failure. It is concluded that these concepts and methodologies can be accepted as an effective means for the evaluation of the operational reliability of EP materials and products, and that the next generation of qualification testing (QT) specifications and practices for such products could be viewed and conducted as a quasi-FOAT that adequately replicates the initial non-destructive segment of the previously conducted comprehensive full-scale FOAT. 

Past Webinars

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IEEE CPMT Webinar: Sintered Nanoparticle-Based Interconnections

Webinar - Online
Marsha Tickman –
SMT Assembly using a novel pure nanocopper metal adhesive  - Dr. Alfred Zinn, Lockheed Martin Space Systems

A nanocopper-based SMT material was developed as a robust, high-performance alternative to solder. This new solder-free nanocopper material overcomes the inherent limitations of traditional solders, wherein the operating temperature is limited by the processing temperature. For the first time, an interconnect material is capable of operating at temperatures not only equal to but even far above its original processing temperature. Being pure copper, the material can form contacts with 5-10x the thermal and electrical conductivity of typical solder systems. The material rheology can be tuned for drop-in replacement of solder on standard PCB assembly lines and other industrial paste dispensing equipment. Such nanoparticle based interconnects can exhibit improved creep resistance and enhanced reliability in low- and high-temperature operating environments. A readily dispensable nanocopper paste was formulated to bond commercial LEDs to a thermal heat sink. To evaluate the quality of the formed bulk copper interconnects, a large number of test samples was fabricated to measure mechanical strength. Shear strengths exceeding 70 MPa have been achieved.

Bonding process using Cu nanoparticles for high-temperature applications - Prof. Hiroshi Nishikawa, Joining and Welding Research Institute, Osaka University, Osaka, Japan

Recently, sintering behavior of nanoparticles has attracted significant interest, because it is well known that nanoparticles of metals such as Au and Ag have lower sintering and melting temperatures than the bulk metal. Nanoparticle bonding is proposed as a solder alternative to establish a new bonding technology for high-temperature applications. In this study, Cu nanoparticle paste was experimentally applied and the effect of bonding conditions on the joint strength of Cu-to-Cu joint using Cu nanoparticle paste was mainly investigated. As a result, it was found that the Cu-to-Cu joining using Cu nanoparticle paste was successfully achieved, and there was a large effect of joining conditions such as heating temperature and bonding atmosphere on the joining strength of the Cu-to-Cu joint.

Silver nanoparticles for inkjet-printed conductive structures in electronic packaging - Prof. Jan Felba, Microsystem Electronics and Photonics; Wroclaw University of Technology

Packaging of today’s miniaturized electronics is based on conductive microstructures and contacts with dimensions in the range of tens of micrometers. Such lines or much more complicated patterns are possible with advanced nanoparticle technologies. Printing is one of the key technologies which is used in microelectronics manufacturing. Printed electronics can be divided into two basic categories – contact or noncontact. In noncontact methods, e.g. inkjet printing, liquid flows freely between a dispenser and a substrate. The technology needs a special liquid, usually termed “ink,” which should satisfy at least the following three requirements: has very low viscosity, can be treated as a “true solvent” without component separation during high acceleration, and is able to make electrically conductive structures. One of the most popular are nanoparticle inks, which are metallic nanoparticle suspensions with some additives to prevent particle agglomeration and sedimentation. This presentation deals with inkjet printing technology using ink containing silver nanoparticles and in particular presents the following issues:
•    Methods of silver nanoparticles production which can be used for preparation of filler for inkjet-printed formulations. 
•    Materials and the principle of inkjet printing

•    Electrical conductivity of printed microstructures

Log-in instructions will be sent to registered attendees via email 1-2 days before the event takes place.

Event Recording


Technical Presentations

Annual IEEE-SCV Soft Error Rate (SER) Workshops (Recordings and/or Presentations from Workshops held 2009-2014)
IEEE Santa Clara Valley CPMT Society Chapter Workshop (with Reliability and Electron Devices Chapters) 
A unique forum for component manufacturers, assembly houses, and electronic system manufacturers to exchange innovative ideas and recent results on the measurement, monitoring, and control of alpha emission from packaging materials and manufacturing processes. Covers a wide range of areas and subjects critical to the control and mitigation of device soft error rates.

July 2013 at SEMICON West 2013

IEEE/CPMT Workshop in: Thin Is In: Thin Chip & Packaging Technologies as Enabler for Innovative Mobile Devices
July 2012 at SEMICON West 2012

CPMT Orange County Workshop, December 9, 2011, Newport Beach, CA. USA